IDE, Memory control & video: Difference between revisions

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| | | SKEW (shift)-----------------------------++++ |BLT
 
| | | SKEW (shift)-----------------------------++++ |BLT
 
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Back to [[Memory Map for Atari ST,STE,TT and Falcon]]
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[[Category: Memory Address ]]
 
[[Category: Memory Address ]]

Revision as of 03:53, 19 February 2012

===========#==#=======#===============================================#=====
----------------------|IDE Bus                                        |-----
===========#==#=======#===============================================#=====
$FFFF0000. |  |       |                                               |
$FFFF0009.B|  |IDE_NSC|Number of Sectors                              |
$FFFF000D.B|  |IDE_SCC|Sector count                                   |
$FFFF0011.B|  |IDE_CYL|Cylinder low                                   |
$FFFF0015.B|  |IDE_CYH|Cylinder high                                  |
$FFFF0019.B|  |IDE_H_D|Head/Drive Register                            |
$FFFF001D.B|  |IDE_S_C|Read:Status Register/Write:Command Register    |
$FFFF0039.B|  |       |                                               |
===========#==#=======#===============================================#=====
----------------------|Memory Controller,System Control               |-----
===========#==#=======#===============================================#=====
$FFFF8001.B|RW|MEM_CTL|Memory Controller                              |
$FFFF8006.W|RW|SYS_CTL|System Control              %MM______ _RS_bB_C |F
           |  |       | Monitor Type (M0,M1)--------++        || || | |F
           |  |       | Monochrome Monitor----------00        || || | |F
           |  |       | RGB Monitor-----------------01        || || | |F
           |  |       | VGA Monitor-----------------10        || || | |F
           |  |       | TV--------------------------11        || || | |F
           |  |       | Reset 0:ignore resetvector------------+| || | |F
           |  |       | STE-compatible-I/O 0:off,1:on----------+ || | |F
           |  |       | Blitterflag 0:on,1:off-------------------+| | |F
           |  |       | Blitterspeed 0:half clock,1:full clock----+ | |F
           |  |       | CPUspeed 0:half clock,1:full clock----------+ |F
===========#==#=======#===============================================#=====
----------------------|DMA,VIDEL Controler                            |-----
===========#==#=======#===============================================#=====
$FFFF8201.B|RW|VDL_VBH|Video Base Hi                                  |
$FFFF8203.B|RW|VDL_VBM|Video Base Mi                                  |
$FFFF8205.B|Rw|VDL_VCH|Video Count Hi                                 |
$FFFF8207.B|Rw|VDL_VCM|Video Count Mi                                 |
$FFFF8209.B|Rw|VDL_VCL|Video Count Lo                       %xxxxxxx_ |
$FFFF820A.B|RW|VDL_SYM|Sync mode                            %______VS |
           |  |       | Vfrequency 0:60hz(NTSC),1:50Hz(PAL)--------+| |
           |  |       | Sync 0:internal,1:external------------------+ |
$FFFF820D.B|RW|VDL_VBL|Video Base Lo                        %xxxxxxx_ |STE,F
$FFFF820E.B|RW|VDL_LOF|Line Offset                                    |STE,F
$FFFF820F.B|RW|   -   |Line Wide-1                                    |STE
$FFFF8210.W|RW|VDL_LWD|Line Wide in Words          %______xx xxxxxxxx |F
$FFFF8240.W|RW|VDL_STC|ST Pallete Register 00      %____rRRR gGGGbBBB |
...........|RW|   -   |......................                         |
$FFFF825E.W|RW|   -   |ST Pallete Register 15                         |
$FFFF8260.B|RW|VDL_SSM|ST-Shift-Mode/TT-Shift-Mode          %_____xxx |
           |  |       | 320*200*4---------------------------------000 |
           |  |       | 640*200*2---------------------------------001 |
           |  |       | 640*400*1---------------------------------010 |
           |  |       | nute--------------------------------------011 |
           |  |       | 640*480*4---------------------------------100 |TT
           |  |       | 1280*960*1--------------------------------101 |TT
           |  |       | 320*480*8---------------------------------110 |TT
           |  |       | nute--------------------------------------111 |TT
$FFFF8264.B|RW|VDL_HSH|H-Scroll Hi                          %____xxxx |F
$FFFF8265.B|RW|VDL_HSL|H-Scroll Lo - clears Line Wide       %____xxxx |STE,F
$FFFF8266.W|RW|VDL_FSM|Falcon Shift Mode           %_____2OT _HV8PPPP |F
           |  |       | 2 Color mode 0:off,1:on----------+||  ||||||| |F
           |  |       | Overlay mode 0:off,1:on-----------+|  ||||||| |F
           |  |       | True(high) color 0:off,1:on--------+  ||||||| |F
           |  |       | Hsync 0:internal,1:external-----------+|||||| |F
           |  |       | Vsync 0:internal,1:external------------+||||| |F
           |  |       | 8 Bitplanes 0:off,1:on------------------+|||| |F
           |  |       | falcon Palette 16 of 256 colors----------++++ |F
$FFFF8280.W|RW|VDL_HHC|Horizontal Hold Counter     %_______x xxxxxxxx |F
$FFFF8282.W|RW|VDL_HHT|Horizontal Hold Timer       %_______x xxxxxxxx |F
$FFFF8284.W|RW|VDL_HBB|Horizontal Border Begin     %_______x xxxxxxxx |F
$FFFF8286.W|RW|VDL_HBE|Horizontal Border End       %_______x xxxxxxxx |F
$FFFF8288.W|RW|VDL_HDB|Horizontal Display Begin    %______Hx xxxxxxxx |F
           |  |       | 0:1.Halftline, 1:2.Halfline-------+           |F
$FFFF828A.W|RW|VDL_HDE|Horizontal Display End      %_______x xxxxxxxx |F
$FFFF828C.W|RW|VDL_HSS|Horizontal Sync Start       %_______x xxxxxxxx |F
$FFFF828E.W|RW|VDL_HFS|Horizontal FS               %_______x xxxxxxxx |F
$FFFF8290.W|RW|VDL_HEE|Horizontal EE               %_______x xxxxxxxx |F
$FFFF82A0.W|RW|VDL_VFC|Vertical Frequenz Counter   %_____xxx xxxxxxxx |F
$FFFF82A2.W|RW|VDL_VFT|Vertical Frequenz Timer     %_____xxx xxxxxxxx |F
$FFFF82A4.W|RW|VDL_VBB|Vertical Border Begin       %_____xxx xxxxxxxx |F
$FFFF82A6.W|RW|VDL_VBE|Vertical Border End         %_____xxx xxxxxxxx |F
$FFFF82A8.W|RW|VDL_VDB|Vertical Display Begin      %_____xxx xxxxxxxx |F
$FFFF82AA.W|RW|VDL_VDE|Vertical Display End        %_____xxx xxxxxxxx |F
$FFFF82AC.W|RW|VDL_VSS|Vertical Sync Start         %_____xxx xxxxxxxx |F
$FFFF82C0.W|RW|VDL_VCT|Video Control               %_______O BHVUSCMM |F
           |  |       | h-base-Offset 0:128cyc,1:64cyc-----+ |||||||| |F
           |  |       | Buswide 0:16bit,1:32bit--------------+||||||| |F
           |  |       | Hsync 0:negative,1:positive-----------+|||||| |F
           |  |       | Vsync 0:negative,1:positive------------+||||| |F
           |  |       | Use FS & EE 0:on,1:off------------------+|||| |F
           |  |       | 15 halflinehSyncs at VBB-----------------+||| |F
           |  |       | video Clock 0:32Mhz,1:25.175Mhz-----------+|| |F
           |  |       | Monitor 0:Mono,1:RGB,2:VGA,3:TV------------++ |F
$FFFF82C2.W|RW|VDL_VMD|Video Mode                  %________ ____xxID |F
           |  |       | Pixclock:4,Divider:4(VGA)/16(STE)/4------00|| |F
           |  |       | Pixclock:2,Divider:2(VGA)/16(STE)/2------01|| |F
           |  |       | Pixclock:1,Divider:2(VGA)/16(STE)/1------10|| |F
           |  |       | nute-------------------------------------11|| |F
           |  |       | Interlace 0:off,1:on-----------------------+| |F
           |  |       | Double Scan 0:off,1:on----------------------+ |F
===========#==#=======#===============================================#=====
----------------------|TT Palette Registers                           |-----
===========#==#=======#===============================================#=====
$FFFF8400.W|RW|TT__PAL|TT Palette Register 000                        |TT
...........|RW|   -   |.......................                        |TT
$FFFF85FE.W|RW|   -   |TT Palette Register 255                        |TT
===========#==#=======#===============================================#=====
----------------------|VIDEL Pallete Register                         |-----
===========#==#=======#===============================================#=====
$FFFF9800.L|RW|VDL_PAL|Pallete Register 000        %RRRRRR__ GGGGGG__ |F
...........|RW|   -   |....................         ________ BBBBBB__ |F
$FFFF98FC.L|RW|   -   |Pallete Register 255                           |F
===========#==#=======#===============================================#=====
----------------------|DMA,Blitter                                    |-----
===========#==#=======#===============================================#=====
$FFFF8A00.W|RW|BLT_HTR|Halftone-Ram 00                                |BLT
...........|RW|   -   |...............                                |BLT
$FFFF8A1E.W|RW|   -   |Halftone-Ram 15                                |BLT
$FFFF8A20.W|RW|BLT_SXI|Source X increment          %xxxxxxxx xxxxxxx_ |BLT
$FFFF8A22.W|RW|BLT_SYI|Source Y increment          %xxxxxxxx xxxxxxx_ |BLT
$FFFF8A24.L|RW|BLT_SRC|Source Address     %xxxxxxxx xxxxxxxx xxxxxxx_ |BLT
$FFFF8A28.W|RW|BLT_EM1|Endmask 1                                      |BLT
$FFFF8A2A.W|RW|BLT_EM2|Endmask 2                                      |BLT
$FFFF8A2C.W|RW|BLT_EM3|Endmask 3                                      |BLT
$FFFF8A2E.W|RW|BLT_DXI|Destination X increment     %xxxxxxxx xxxxxxx_ |BLT
$FFFF8A30.W|RW|BLT_DYI|Destination Y increment     %xxxxxxxx xxxxxxx_ |BLT
$FFFF8A32.L|RW|BLT_DST|Destination Adr.   %xxxxxxxx xxxxxxxx xxxxxxx_ |BLT
$FFFF8A36.W|RW|BLT_WPL|Words per Line in BOB                 (0:65536)|BLT
$FFFF8A38.W|RW|BLT_LPB|Lines per BOB                         (0:65536)|BLT
$FFFF8A3A.B|RW|BLT_HTO|Halftone Operation                   %______xx |BLT
           |  |       | 0:set all Bits, 1:HTR, 2:SRC, 3:SRC & HTR     |BLT
$FFFF8A3B.B|RW|BLT_LGO|Logical Operation                    %____xxxx |BLT
           |  |       | (!S AND !D)------------------------------+||| |BLT
           |  |       | (!S AND  D)-------------------------------+|| |BLT
           |  |       | ( S AND !D)--------------------------------+| |BLT
           |  |       | ( S AND  D)---------------------------------+ |BLT
$FFFF8A3C.B|RW|BLT_LNM|Line Number                          %BHS_xxxx |BLT
           |  |       | Busy (1:start Blitter)---------------+|| |||| |BLT
           |  |       | HOG (1:stop CPU when Busy)------------+| |||| |BLT
           |  |       | SMUDGE (use sourcebits 0-3 as HTR num)-+ |||| |BLT
           |  |       | Halftone-Ram number----------------------++++ |BLT
$FFFF8A3D.B|RW|BLT_SKW|SKEW                                 %FN__xxxx |BLT
           |  |       | FXSR (Force eXtra Source Read)-------+|  |||| |BLT
           |  |       | NFSR (No Final Source Read)-----------+  |||| |BLT
           |  |       | SKEW (shift)-----------------------------++++ |BLT



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